On the assumption of mutual independence of jitter realizations in P-TRNG stochastic models

International audienceSecurity in true random number generation in cryptography is based on entropy per bit at the generator output. The entropy is evaluated using stochastic models. Several recent works propose stochastic models based on assumptions related to selected physical analog phenomena such as noise or jittery signal and on the knowledge of the principle of randomness extraction from the obtained analog signal. However, these assumptions simplify often considerably the underlying analog processes, which include several noise sources. In this paper, we present a new comprehensive multilevel approach, which enables to build the stochastic model based on detailed analysis of noise sources starting at transistor level and on conversion of the noise to the clock jitter exploited at the generator level. Using this approach, we can estimate proportion of the jitter coming only from the thermal noise, which is included in the total clock jitter

Remote Side-Channel Attacks on Heterogeneous SoC

International audienceThanks to their performance and flexibility, FPGAs are increasingly adopted for hardware acceleration on various platforms such as system on chip and cloud datacenters. Their use for commercial and industrial purposes raises concern about potential hardware security threats. By getting access to the FPGA fabric, an attacker could implement malicious logic to perform remote hardware attacks. Recently, several papers demonstrated that FPGA can be used to eavesdrop or disturb the activity of resources located within and outside the chip. In a complex SoC that contains a processor and a FPGA within the same die, we experimentally demonstrate that FPGA-based voltage sensors can eavesdrop computations running on the CPU and that advanced side-channel attacks can be conducted remotely to retrieve the secret key of a symmetric crypto-algorithm

Multi-Variate High-Order Attacks of Shuffled Tables Recomputation

Masking schemes based on tables recomputation are classical countermeasures against high-order side-channel attacks. Still, they are known to be attackable at order $d$ in the case the masking involves $d$ shares. In this work, we mathematically show that an attack of order strictly greater than $d$ can be more successful than an attack at order $d$. To do so, we leverage the idea presented by Tunstall, Whitnall and Oswald at FSE 2013: we exhibit attacks which exploit the multiple leakages linked to one mask during the recomputation of tables. Specifically, regarding first-order table recomputation, improved by a shuffled execution, we show that there is a window of opportunity, in terms of noise variance, where a novel highly multivariate third-order attack is more efficient than a classical bivariate second-order attack. Moreover, we show on the example of the high-order secure table computation presented by Coron at EUROCRYPT 2014 that the window of opportunity enlarges linearly with the security order $d$

Boosting Higher-Order Correlation Attacks by Dimensionality Reduction

Multi-variate side-channel attacks allow to break higher-order masking protections by combining several leakage samples. But how to optimally extract all the information contained in all possible $d$-tuples of points? In this article, we introduce preprocessing tools that answer this question. We first show that maximizing the higher-order CPA coefficient is equivalent to finding the maximum of the covariance. We apply this equivalence to the problem of trace dimensionality reduction by linear combination of its samples. Then we establish the link between this problem and the Principal Component Analysis. In a second step we present the optimal solution for the problem of maximizing the covariance. We also theoretically and empirically compare these methods. We finally apply them on real measurements, publicly available under the DPA Contest v4, to evaluate how the proposed techniques improve the second-order CPA (2O-CPA)

Ingénierie et robustesse des systèmes embarqués sécuritaires

Les composants de sécurité de type carte à puce (smartcard) ou les systèmes sur puce (System On Chip) à fonction sécuritaire sont soumis depuis plus d'une dizaine d'années à une nouvelle classe d'attaques appelées attaques par canaux cachés (Side Channel Attack). Ces attaques visent à obtenir des informations du composant en utilisant par exemple sa consommation en courant ou son rayonnement électromagnétique. Par extension ces attaques permettent aussi de perturber le fonctionnement du composant par injection de fautes au moyen de faisceaux lasers ; le but étant de récupérer des secrets ou d'obtenir des privilèges. Dans cette thèse, nous présenterons un état de l'art de ces menaces ainsi que diverses contributions à des contre-mesures contre les. Ceci sera illustré au moyen de publications et brevets, mettant en œuvre divers paradigmes pour lutter contre les fraudes. Nous montrerons notamment que les protections peuvent se situer au niveau arithmétique, algorithmique ou électronique et que des combinaisons sont possibles et souhaitables Nous aborderons aussi le sujet des générateurs de nombres aléatoires, nécessaires à la création de contre mesures, sous la perspective de tests statistiques qui permettent d en évaluer la qualité. Nous dresserons enfin des perspectives de recherche quant au devenir des attaques tout autant que des contre-mesures dans des systèmes hétérogènes où la sécurité est un compromis entre le coût, la performance et la résistance du système.PARIS-BIUSJ-Mathématiques rech (751052111) / SudocSudocFranceF

How SGX security claims meet real life scenarios

International audienc

SGX face aux menaces micro architecturales : efficacité et limitations

National audienc

Recovering information on a RISC-V CPU with a baremetal micro-architectural covert channel

International audienc